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Serial ATA (SATA) interface
5.2
Serial ATA device plug connector pin definitions
Table 11 summarizes the signals on the Serial ATA interface and power connectors.
Table 11Serial ATA connector pin definitions
Segment
Pin
Function
Definition
Signal
S1
Ground
2nd mate
S2
A+
Differential signal pair A from Phy
S3
A-
S4
Ground
2nd mate
S5
B-
Differential signal pair B from Phy
S6
B+
S7
Ground
2nd mate
Key and spacing separate signal and power segments
Power
P1
V33
Not Used (P1 and P2 tied internally)
P2
V33
Not Used (P1 and P2 tied internally)
P3
PWRDIS
Enter/Exit Power Disable (option)
P4
Ground
1st mate
P5
Ground
2nd mate
P6
Ground
2nd mate
P7
V5
5V power, pre-charge, 2nd mate
P8
V5
5V power
P9
V5
5V power
P10
Ground
2nd mate
P11
Ground or LED signal
If grounded, drive does not use deferred spin
P12
Ground
1st mate.
P13
V12
12V power, pre-charge, 2nd mate
P14
V12
12V power
P15
V12
12V power
Notes:
1.
All pins are in a single row, with a 1.27mm (0.050”) pitch.
2.
The comments on the mating sequence apply to the case of backplane blindmate connector only. In this case, the
mating sequences are:
—
the ground pins P4 and P12.
—
the pre-charge power pins and the other ground pins.
—
the signal pins and the rest of the power pins.
3.
There are three power pins for each voltage. One pin from each voltage is used for pre-charge when installed in a
blind-mate backplane configuration.
4.
All used voltage pins (Vx) must be terminated.
Seagate Exos X24 SATA Product Manual, Rev. C
33