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8.4 Cylinder Low Register
This register contains the low order bits of the starting cylinder address for any disk access. At the end of the command,
this register is updated to reflect the current cylinder number.
This register contains LBA Bits 8-15. At the end of the command, this register is updated to reflect the current LBA
Bits 8-15.
The cylinder number may be from zero to the number of cylinders minus one.
When 48-bit addressing commands are used, the “most recently written” content contains LBA Bits 8-15, and the
“previous content” contains Bits 32-39.
8.5 Device Control Register
Table 23 Device Control Register
Device Control Register
7
6
5
4
3
2
1
0
HOB
-
-
-
1
SRST
-IEN
0
Bit Definitions
HOB
HOB (high order byte) is defined by the 48-bit Address feature set. A write to any Command
Register shall clear the HOB bit to zero.
SRST (RST)
Software Reset. The device is held reset when RST=1. Setting RST=0 re-enables the device.
The host must set RST=1 and wait for at least 5 microseconds before setting RST=0, to ensure
that the device recognizes the reset.
-IEN
Interrupt Enable. When –IEN=0, and the device is selected, device interrupts to the host will be
enabled. When –IEN=1, or the device is not selected, device interrupts to the host will be disabled.
49
Hard Disk Drive Specification