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Chapter 2: Installation
4-pin External BMC I2C Header (X11SCZ-F only)
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect a cable to
this header to use the IPMB I2C connection on your system. Refer to the table below for pin
definitions.
External I2C Header
Pin Definitions
Pin#
Definition
1
Data
2
Ground
3
Clock
4
No Connection
Power SMB (I2C) Header (X11SCZ-F only)
Power System Management Bus (I2C) header at JPI2C1 monitors the power supply, fan and
system temperatures. Refer to the table below for pin definitions.
Power SMB Header
Pin Definitions
Pin#
Definition
1
Clock
2
Data
3
Power Fail
4
Ground
5
+3.3V
1. IPMB Header
24
17
A12
A13
C4
A
C
A12
B12
B1
B11
B2
B12
B1
B11
B2
9
A11
16
2
21
C2
3
1
4
1
A1
A1
A12
C5A
C1
C2
8
C5A
AUDIO
24
23
22
1
4
9
5
B2
A1
B12
2. Power SMB I2C Header
UID SW
UID LED1
A2
B13
18
USB11/12 (3.1)
19
DVI-I/VGA
DP++ 1/2
B11
A9
AUDIO FP
COM3/4
23
22
21
20
A10
B10
B9
BMC
LAN1/2
USB9/10 (3.1)
IPMI_LAN
C
BMC_HB_LED1
A
SRW5
22110
JPL2
JPL1
JPV1
JPAC1
1-2:Enable
2-3:Disable
2-3:Disable
1-2:Enable
JPL2:LAN2
JPL1:LAN1
JPG1:BMC VGA DISABLE JUMPER
1-2:NORMAL (DEFAULT)
2-3:DISABLE BMC VGA
JPAC1
1-2:Enable Audio(DEFAULT)
2-3:DISABLE Audio
FAN4
BAR CODE
SRW6
CPU SLOT6 PCI-E 3.0x16
COM1/2
2280
BAR CODE
PCH SLOT4 PCI-E 3.0x4(INx8)
JPW1
PCH SLOT7 PCI-E 3.0x4(INx8)
BAR CODE
DESIGNED IN USA
X11SCZ-Q
REV:1.10
SP1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
JTPM1
BAR CODE
JPT1
JIPMB1
CPU
JPT1 TPM Enable/Disable
1-2:ENABLE
2-3:DISABLE
1
BT1
USB13/14 (3.1)
Always populate DIMMx1 first
2
JMD1
BIOS LICENSE
1
J18
M.2:PCI-E 3.0x4
JPH1
PCH
JF1
JBT1
ON
BAR CODE
RST
PWR
X
FAN1
FF
CPU FAN
OH
C
LED1
JD1:
1-4:SPAKER
3-4:BUZZER
2-3:PEG 2x8
1-2:PEG 1x16
JRF1:
I-SATA0
1-2:NORMAL
JPME2
NMI
PWR
LED
X
HDD
LED
NIC1
NIC2
SUPERDOM
2-3:ME MANUFACTURING MODE
JSD1:SATA DOM POWER
JWD1:WATCHDOG
JSMB1:SMBus1
JD1
JPWR1
JSMB1
1-2:RST(Default)
4
3
2-3:NMI
2
JRF1
JL1:CHASSIS INTRUSION
1
JPI2C1
USB0
2
1
JGP1
FANB
JSD1
JL1
I-SGPIO1
FAN3
FAN2
JPME2
I-SATA1
I-SATA2
I-SATA3
I-SATA4
USB7/8 (3.0)
1
JPG1
USB1/2
JWD1
USB5/6
USB3/4
FANA
51